Statistical Analysis of Delay Faults — Theory and Efficient Computation

In this paper we propose a new measure for judging the dynamic behavior and testability of integrated circuits. This measure, called delay fault probability (DFP), is based on a statistical analysis of delay faults. For its computation, a sequence of signal delay faults along a path, their correlation, and the clock cycle time are considered. In order to properly model these distributed delays we choose the path delay fault model. Experimental results show that DFP is a more accurate measure for assuring the dynamic behavior of a circuit than fault coverages. As computation of DFP requires an efficient method for path classification, i.e. for determining the sets of testable, robust dependent and so-called relevant paths, respectively, we propose a new and efficient method for identifying robust dependent paths based on reconvergence analysis. Functional sensitization is only performed for path segments contained in a minimal set of reconvergenceregions. Thus, the complexity for path classification can be reduced from the total number of paths in the circuit to the number of paths included in the minimal set of reconvergence regions.